put custom template format into xilinx autogenerated files

If you have your own installation of the software you could hard code your changes into the Tcl scripts that control this.

For example, the company name could be entered for VHDL modules and VHDL TBs in the following files.

– VHDL Module - line 713
– VHDL Testbench

I modified my file like this: (however I had some issues later and it wasn't doing anything, just creating blank files, If you have a solution for this please let me know, if not try this under your own risk.)

set _t [clock seconds]
set _ts [clock format $_t -format "%H:%M:%S %m/%d/%Y"]
set _date_stamp [clock -format "%m/%d/%Y"]
global xilinx::Dpm::INewSourceHdlDataID
set _iHdlData [$iNewSourceComp GetInterface $INewSourceHdlDataID]
if { $_iHdlData == 0 } {
return [dpm_Fail "interface passed to Create New Source code hook is invalid."]
set _entityName ""
dpm_returnOnFail { $_iHdlData GetEntityName _entityName }
set _archName ""
dpm_returnOnFail { $_iHdlData GetModuleName _archName }
dpm_Debug 11 "architecture returned is $_archName"
set _portIter 0
$_iHdlData GetPorts _portIter
puts $hFile "----------------------------------------------------------------------------------"
puts $hFile "-- Company: LBNL"
puts $hFile "-- Engineer: Luis Ardila (luis.ardila@bozica.co)"
puts $hFile "-- "
puts $hFile "-- Create Date: $_ts "
puts $hFile "-- Design Name: "
puts $hFile "-- Module Name: $_entityName - $_archName "
puts $hFile "-- Project Name: "
puts $hFile "-- Target Devices: "
puts $hFile "-- Tool versions: "
puts $hFile "-- Description: "
puts $hFile "--"
puts $hFile "-- Dependencies: "
puts $hFile "--"
puts $hFile "-- Revision: "
puts $hFile "-- Date Version Author Description"
puts $hFile "-- $_date_stamp 1.0 Luis Ardila File Created"
puts $hFile "-- Additional Comments: "
puts $hFile "--"
puts $hFile "----------------------------------------------------------------------------------"
puts $hFile "LIBRARY IEEE;"
puts $hFile "USE IEEE.STD_LOGIC_1164.ALL;"


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